2 years ago
#41802

Tom Jose
how to get the arm instruction disassembly of Global Offset Table (GOT) and plt
I am trying to generate the disassembly of dhrystone. The following commands were used:
aarch64-none-linux-gnu-gcc -O0 -mtune=cortex-a77 -mcpu=cortex-a77 --static -c -DHZ=60 -O2 -fno-inline -fno-pie dhry_1.c
aarch64-none-linux-gnu-gcc -O0 -mtune=cortex-a77 -mcpu=cortex-a77 --static -c -DHZ=60 -O2 -fno-inline -fno-pie dhry_2.c
aarch64-none-linux-gnu-gcc -O0 -mtune=cortex-a77 -mcpu=cortex-a77 --static -fno-pie -o dhrystone dhry_1.o dhry_2.o
For generating the disassembly, the following command was used:
aarch64-none-linux-gnu-objdump -D -x -s -t dhrystone | tee cmdPrint_dhrystone.txt
This generates the following file (only small snippets shown here):
Disassembly of section .plt:
0000000000400270 <.plt>:
400270: b00004d0 adrp x16, 499000 <_GLOBAL_OFFSET_TABLE_+0xb8>
400274: f9400211 ldr x17, [x16]
400278: 91000210 add x16, x16, #0x0
40027c: d61f0220 br x17
400280: b00004d0 adrp x16, 499000 <_GLOBAL_OFFSET_TABLE_+0xb8>
400284: f9400611 ldr x17, [x16, #8]
400288: 91002210 add x16, x16, #0x8
40028c: d61f0220 br x17
400290: b00004d0 adrp x16, 499000 <_GLOBAL_OFFSET_TABLE_+0xb8>
400294: f9400a11 ldr x17, [x16, #16]
400298: 91004210 add x16, x16, #0x10
40029c: d61f0220 br x17
4002a0: b00004d0 adrp x16, 499000 <_GLOBAL_OFFSET_TABLE_+0xb8>
4002a4: f9400e11 ldr x17, [x16, #24]
4002a8: 91006210 add x16, x16, #0x18
4002ac: d61f0220 br x17
4002b0: b00004d0 adrp x16, 499000 <_GLOBAL_OFFSET_TABLE_+0xb8>
4002b4: f9401211 ldr x17, [x16, #32]
4002b8: 91008210 add x16, x16, #0x20
4002bc: d61f0220 br x17
4002c0: b00004d0 adrp x16, 499000 <_GLOBAL_OFFSET_TABLE_+0xb8>
4002c4: f9401611 ldr x17, [x16, #40]
4002c8: 9100a210 add x16, x16, #0x28
4002cc: d61f0220 br x17
4002d0: b00004d0 adrp x16, 499000 <_GLOBAL_OFFSET_TABLE_+0xb8>
4002d4: f9401a11 ldr x17, [x16, #48]
4002d8: 9100c210 add x16, x16, #0x30
4002dc: d61f0220 br x17
If we look at the first 4 lines:
400270: b00004d0 adrp x16, 499000 <_GLOBAL_OFFSET_TABLE_+0xb8>
400274: f9400211 ldr x17, [x16]
400278: 91000210 add x16, x16, #0x0
40027c: d61f0220 br x17
we can see a branch instruction going to the address stored in x17 register, which is in GLOBAL_OFFSET_TABLE.
We can find the description of GLOBAL_OFFSET_TABLE in the same file. It provides the following:
Disassembly of section .got:
0000000000498f48 <_GLOBAL_OFFSET_TABLE_>:
...
498f50: ffb676a0 .inst 0xffb676a0 ; undefined
498f54: ffffffff .inst 0xffffffff ; undefined
...
498f60: ffb676a0 .inst 0xffb676a0 ; undefined
498f64: ffffffff .inst 0xffffffff ; undefined
498f68: ffb676a0 .inst 0xffb676a0 ; undefined
498f6c: ffffffff .inst 0xffffffff ; undefined
498f70: ffb676a0 .inst 0xffb676a0 ; undefined
498f74: ffffffff .inst 0xffffffff ; undefined
498f78: ffb676a0 .inst 0xffb676a0 ; undefined
498f7c: ffffffff .inst 0xffffffff ; undefined
498f80: 00000060 udf #96
498f84: 00000000 udf #0
498f88: 00000010 udf #16
498f8c: 00000000 udf #0
498f90: 00000030 udf #48
498f94: 00000000 udf #0
498f98: 00000018 udf #24
498f9c: 00000000 udf #0
498fa0: ffb676a0 .inst 0xffb676a0 ; undefined
498fa4: ffffffff .inst 0xffffffff ; undefined
498fa8: 00000050 udf #80
498fac: 00000000 udf #0
498fb0: ffb676a0 .inst 0xffb676a0 ; undefined
498fb4: ffffffff .inst 0xffffffff ; undefined
498fb8: 00000020 udf #32
498fbc: 00000000 udf #0
498fc0: ffb676a0 .inst 0xffb676a0 ; undefined
498fc4: ffffffff .inst 0xffffffff ; undefined
498fc8: 00000058 udf #88
498fcc: 00000000 udf #0
498fd0: 00000028 udf #40
498fd4: 00000000 udf #0
498fd8: ffb676a0 .inst 0xffb676a0 ; undefined
498fdc: ffffffff .inst 0xffffffff ; undefined
...
There is no proper instructions defined. Its mostly .inst (undefined). I would like to know if there is any means to get a meaningful instruction disassembly of the got/plt so that i can sweep through them and know where to go next.
Any suggestions/details will be appreciated. If i am wrong in my understanding, please feel free to correct me. Thanks in advance.
arm
decode
disassembly
objdump
armv8
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