I'm working with one of the Synopsys DesignWare multiplier IPs. It takes in two inputs of width N and M and outputs two partial products of width N+M+2 that the user must add together to obtain the final product. It supports both signed and unsigned sources via toggling another input bit.

I can't seem to figure out why the partial products require N+M+2 width. Why should it not be just N+M? I have searched on binary multiplication with partial products and I have not found any evidence that could explain this. Everything points to the product being N+M. I also could not find any explanation in the Synopsys spec other than N+M+2 being a 'requirement' for the outputs. Is this just a vendor-specific quirk or is there some arithmetic reasoning behind it?