I wrote a code that is supposed to have a one-bit digital input, and when you provide the last two digits of your student ID to the input (starting from least significant) the output of the circuit will go high.

The code is working but the output is high for all values from 01 to 09. I would appreciate any help.

`timescale 1ns / 1ps
module seq_detector(
    input wire x, clk, reset,
    output reg z
    );
     localparam [1:0] s0=2'b00, s1=2'b01, s2=2'b10;
     reg [1:0] p_state, n_state;
     always @ (posedge clk, posedge reset)
     if (reset)
     p_state <= s0;
     else
     p_state <= n_state;
     always @ ( p_state , x) begin
     z=1'd0;
     case (p_state)
     s0: if (~x) n_state = s1;
     else n_state = s0;
     s1: if (x) n_state = s2;
     else n_state = s1;
     s2:  begin
                z =1'd1;
        if (x) n_state = s1;
        else n_state = s0;
        end
        default: n_state = s0;
        endcase
        end
endmodule




`timescale 1ns / 1ps
module testbench;
    // Inputs
    reg x;
    reg clk;
    reg reset;
    // Outputs
    wire z;
    // Instantiate the Unit Under Test (UUT)
    seq_detector uut (
        .x(x), 
        .clk(clk), 
        .reset(reset), 
        .z(z)
    );
    
initial
    begin
        clk = 1'b0;
        reset = 1'b1;
        #15 reset = 1'b0;
    end

always #5 clk = ~ clk;  

initial begin
        #12 x = 0;#10 x = 0 ; #10 x = 1 ; #10 x = 0 ;
        #12 x = 0;#10 x = 0 ; #10 x = 1 ; #10 x = 0 ;
        #12 x = 0;#10 x = 0 ; #10 x = 0 ; #10 x = 1 ;
        #10 $finish;
    end
endmodule