I'm working on a dual-core Cortex-R52 ARM chip, with an instance of FreeRTOS running in each core (AMP), and using ICCARM (IAR) as my compiler.

I need to ensure that CPU1 initialize some tasks, in order to pass their handler to CPU0 through the shared memory, but both cores are executed at the same time, which creates a problem in the scenario where CPU0 gets to using the supposedly passed handler, that wasn't created yet by CPU1.

A solution I tried, was creating a volatile variable pdSTART at a dedicated address space, which keeps CPU0 looping as long as its equal to 0:

#pragma location = 0x100F900C
__no_init volatile uint8_t pdSTART;

while (pdSTART == 0)
{
    vTaskDelay(10 / portTICK_PERIOD_MS);
}

As expected the generated assembly was as follows:

vTaskDelay(10 / portTICK_PERIOD_MS);
    0xc3a: 0x200a         MOVS      R0, #10                 ; 0xa
    0xc3c: 0xf000 0xf93c  BL        vTaskDelay              ; 0xeb8
while (pdSTART == 0)
    0xc40: 0x7b28         LDRB      R0, [R5, #0xc]
    0xc42: 0x2800         CMP       R0, #0
    0xc44: 0xd0f9         BEQ.N     0xc3a

With register R5 containing the address 0x100F9000.

Using the debugger I made sure CPU0 reaches the while condition first and gets in the loop, I then made CPU1 change the value of pdSTART, which I confirmed on the memory map

    pdSTART:
  0x100f'900c: 0x0000'0001    DC32      VECTOR_RBLOCK$$Base

And yet the condition on CPU0 remains false and pdSTART is never updated, both the memory map and "Watch" window of the debugger show the variable updated.

I tried explicitly writing a read from the address of pdSTART:

void func(void)
{
  asm volatile ("" : : "r" (*(uint8_t *)0x100F900C));
}

But the generated assembly was the same as the while condition.

Is the old value of pdSTART saved into some kind of stack or cache? is there a way to forcefully update it?

Thank you.