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Is instruction encoded differently from .so file to runtime memory?
I have an Android .so file that uses ARM-V7A instruction set.
I drag it into IDA, and there is one line that shows :
0x1000: b #0x102c
And the hex window shows that the binary code of b #0x102c is 14...
user16387400
Votes: 0
Answers: 1
how arm-thumb instruction set's blx instruction support 4MB range
Read from https://www.keil.com/support/man/docs/armasm/armasm_dom1361289866046.htm that arm-thumb instruction's blx instruction can support maximum 4MB of jump range.
But as far as I know, arm-thumb i...
user16387400
Votes: 0
Answers: 1
Force NASM to use quadwords
In gas, I can do movabs rcx, 0x402041, which assembles to 48b941204000. NASM doesn't support movabs. I've tried doing mov rcx, 0x402041, and mov rcx, QWORD 0x402041, but, in either case, NASM assemb...
SRobertJames
Votes: 0
Answers: 0
How does the RMI Instruction Operand Encoding of ROUNDSS work?
A few x86 instructions like ROUNDSS require this seemingly obscure instruction operand encoding, on which I can't find any documentation or definition in Intel's Software Developer's Manual.
How are t...
soc
Votes: 0
Answers: 1